x86匯編指令集
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數(shù)據(jù)傳輸指令 它們在存貯器和寄存器、寄存器和輸入輸出端口之間傳送數(shù)據(jù).
1. 通用數(shù)據(jù)傳送指令.
MOV 傳送字或字節(jié).
MOVSX 先符號擴(kuò)展,再傳送.
MOVZX 先零擴(kuò)展,再傳送.
MOVSX reg16,r/m8 ; o16 0F BE /r [386]
MOVSX reg32,r/m8 ; o32 0F BE /r [386]
MOVSX reg32,r/m16 ; o32 0F BF /r [386]
MOVZX reg16,r/m8 ; o16 0F B6 /r [386]
MOVZX reg32,r/m8 ; o32 0F B6 /r [386]
MOVZX reg32,r/m16 ; o32 0F B7 /r [386]
PUSH 把字壓入堆棧.
POP 把字彈出堆棧.
PUSHA 把AX,CX,DX,BX,SP,BP,SI,DI依次壓入堆棧.
POPA 把DI,SI,BP,SP,BX,DX,CX,AX依次彈出堆棧.
PUSHAD 把EAX,ECX,EDX,EBX,ESP,EBP,ESI,EDI依次壓入堆棧.
POPAD 把EDI,ESI,EBP,ESP,EBX,EDX,ECX,EAX依次彈出堆棧.
BSWAP 交換32位寄存器里字節(jié)的順序
XCHG 交換字或字節(jié).( 至少有一個操作數(shù)為寄存器,段寄存器不可作為操作數(shù))
CMPXCHG 比較并交換操作數(shù).( 第二個操作數(shù)必須為累加器AL/AX/EAX )
XADD 先交換再累加.( 結(jié)果在第一個操作數(shù)里 )
XLAT 字節(jié)查表轉(zhuǎn)換.
—— BX 指向一張 256 字節(jié)的表的起點, AL 為表的索引值 (0-255,即
0-FFH); 返回 AL 為查表結(jié)果. ( [BX+AL]-AL )
2. 輸入輸出端口傳送指令.
IN I/O端口輸入. ( 語法: IN 累加器, {端口號│DX} )
OUT I/O端口輸出. ( 語法: OUT {端口號│DX},累加器 )
輸入輸出端口由立即方式指定時, 其范圍是 0-255; 由寄存器 DX 指定時,
其范圍是 0-65535.
3. 目的地址傳送指令.
LEA 裝入有效地址.
例: LEA DX,string ;把偏移地址存到DX.
LDS 傳送目標(biāo)指針,把指針內(nèi)容裝入DS.
例: LDS SI,string ;把段地址:偏移地址存到DS:SI.
LES 傳送目標(biāo)指針,把指針內(nèi)容裝入ES.
例: LES DI,string ;把段地址:偏移地址存到ES:DI.
LFS 傳送目標(biāo)指針,把指針內(nèi)容裝入FS.
例: LFS DI,string ;把段地址:偏移地址存到FS:DI.
LGS 傳送目標(biāo)指針,把指針內(nèi)容裝入GS.
例: LGS DI,string ;把段地址:偏移地址存到GS:DI.
LSS 傳送目標(biāo)指針,把指針內(nèi)容裝入SS.
例: LSS DI,string ;把段地址:偏移地址存到SS:DI.
4. 標(biāo)志傳送指令.
LAHF 標(biāo)志寄存器傳送,把標(biāo)志裝入AH.
SAHF 標(biāo)志寄存器傳送,把AH內(nèi)容裝入標(biāo)志寄存器.
PUSHF 標(biāo)志入棧.
POPF 標(biāo)志出棧.
PUSHD 32位標(biāo)志入棧.
POPD 32位標(biāo)志出棧.
二、算術(shù)運算指令
———————————————————————————————————————
ADD 加法.
ADC 帶進(jìn)位加法.
INC 加 1.
AAA 加法的ASCII碼調(diào)整.
DAA 加法的十進(jìn)制調(diào)整.
SUB 減法.
SBB 帶借位減法.
DEC 減 1.
NEC 求反(以 0 減之).
CMP 比較.(兩操作數(shù)作減法,僅修改標(biāo)志位,不回送結(jié)果).
AAS 減法的ASCII碼調(diào)整.
DAS 減法的十進(jìn)制調(diào)整.
MUL 無符號乘法.
IMUL 整數(shù)乘法.
以上兩條,結(jié)果回送AH和AL(字節(jié)運算),或DX和AX(字運算),
AAM 乘法的ASCII碼調(diào)整.
DIV 無符號除法.
IDIV 整數(shù)除法.
以上兩條,結(jié)果回送:
商回送AL,余數(shù)回送AH, (字節(jié)運算);
或 商回送AX,余數(shù)回送DX, (字運算).
AAD 除法的ASCII碼調(diào)整.
CBW 字節(jié)轉(zhuǎn)換為字. (把AL中字節(jié)的符號擴(kuò)展到AH中去)
CWD 字轉(zhuǎn)換為雙字. (把AX中的字的符號擴(kuò)展到DX中去)
CWDE 字轉(zhuǎn)換為雙字. (把AX中的字符號擴(kuò)展到EAX中去)
CDQ 雙字?jǐn)U展. (把EAX中的字的符號擴(kuò)展到EDX中去)
三、邏輯運算指令
———————————————————————————————————————
AND 與運算.
OR 或運算.
XOR 異或運算.
NOT 取反.
TEST 測試.(兩操作數(shù)作與運算,僅修改標(biāo)志位,不回送結(jié)果).
SHL 邏輯左移.
SAL 算術(shù)左移.(=SHL)
SHR 邏輯右移.
SAR 算術(shù)右移.(=SHR)
ROL 循環(huán)左移.
ROR 循環(huán)右移.
RCL 通過進(jìn)位的循環(huán)左移.
RCR 通過進(jìn)位的循環(huán)右移.
以上八種移位指令,其移位次數(shù)可達(dá)255次.
移位一次時, 可直接用操作碼. 如 SHL AX,1.
移位1次時, 則由寄存器CL給出移位次數(shù).
如 MOV CL,04
SHL AX,CL
四、串指令
———————————————————————————————————————
DS:SI 源串段寄存器 :源串變址.
ES:DI 目標(biāo)串段寄存器:目標(biāo)串變址.
CX 重復(fù)次數(shù)計數(shù)器.
AL/AX 掃描值.
D標(biāo)志 0表示重復(fù)操作中SI和DI應(yīng)自動增量; 1表示應(yīng)自動減量.
Z標(biāo)志 用來控制掃描或比較操作的結(jié)束.
MOVS 串傳送.
( MOVSB 傳送字符. MOVSW 傳送字. MOVSD 傳送雙字. )
CMPS 串比較.
( CMPSB 比較字符. CMPSW 比較字. )
SCAS 串掃描.
把AL或AX的內(nèi)容與目標(biāo)串作比較,比較結(jié)果反映在標(biāo)志位.
LODS 裝入串.
把源串中的元素(字或字節(jié))逐一裝入AL或AX中.
( LODSB 傳送字符. LODSW 傳送字. LODSD 傳送雙字. )
STOS 保存串.
是LODS的逆過程.
REP 當(dāng)CX/ECX0時重復(fù).
REPE/REPZ 當(dāng)ZF=1或比較結(jié)果相等,且CX/ECX0時重復(fù).
REPNE/REPNZ 當(dāng)ZF=0或比較結(jié)果不相等,且CX/ECX0時重復(fù).
REPC 當(dāng)CF=1且CX/ECX0時重復(fù).
REPNC 當(dāng)CF=0且CX/ECX0時重復(fù).
五、程序轉(zhuǎn)移指令
———————————————————————————————————————
1無條件轉(zhuǎn)移指令 (長轉(zhuǎn)移)
JMP 無條件轉(zhuǎn)移指令
CALL 過程調(diào)用
RET/RETF過程返回.
2條件轉(zhuǎn)移指令 (短轉(zhuǎn)移,-128到+127的距離內(nèi))
( 當(dāng)且僅當(dāng)(SF XOR OF)=1時,OP1 JA/JNBE 不小于或不等于時轉(zhuǎn)移.
JAE/JNB 大于或等于轉(zhuǎn)移.
JB/JNAE 小于轉(zhuǎn)移.
JBE/JNA 小于或等于轉(zhuǎn)移.
以上四條,測試無符號整數(shù)運算的結(jié)果(標(biāo)志C和Z).
JG/JNLE 大于轉(zhuǎn)移.
JGE/JNL 大于或等于轉(zhuǎn)移.
JL/JNGE 小于轉(zhuǎn)移.
JLE/JNG 小于或等于轉(zhuǎn)移.
以上四條,測試帶符號整數(shù)運算的結(jié)果(標(biāo)志S,O和Z).
JE/JZ 等于轉(zhuǎn)移.
JNE/JNZ 不等于時轉(zhuǎn)移.
JC 有進(jìn)位時轉(zhuǎn)移.
JNC 無進(jìn)位時轉(zhuǎn)移.
JNO 不溢出時轉(zhuǎn)移.
JNP/JPO 奇偶性為奇數(shù)時轉(zhuǎn)移.
JNS 符號位為 "0" 時轉(zhuǎn)移.
JO 溢出轉(zhuǎn)移.
JP/JPE 奇偶性為偶數(shù)時轉(zhuǎn)移.
JS 符號位為 "1" 時轉(zhuǎn)移.
3循環(huán)控制指令(短轉(zhuǎn)移)
LOOP CX不為零時循環(huán).
LOOPE/LOOPZ CX不為零且標(biāo)志Z=1時循環(huán).
LOOPNE/LOOPNZ CX不為零且標(biāo)志Z=0時循環(huán).
JCXZ CX為零時轉(zhuǎn)移.
JECXZ ECX為零時轉(zhuǎn)移.
4中斷指令
INT 中斷指令
INTO 溢出中斷
IRET 中斷返回
5處理器控制指令
HLT 處理器暫停, 直到出現(xiàn)中斷或復(fù)位信號才繼續(xù).
WAIT 當(dāng)芯片引線TEST為高電平時使CPU進(jìn)入等待狀態(tài).
ESC 轉(zhuǎn)換到外處理器.
LOCK 封鎖總線.
NOP 空操作.
STC 置進(jìn)位標(biāo)志位.
CLC 清進(jìn)位標(biāo)志位.
CMC 進(jìn)位標(biāo)志取反.
STD 置方向標(biāo)志位.
CLD 清方向標(biāo)志位.
STI 置中斷允許位.
CLI 清中斷允許位.
六、偽指令
———————————————————————————————————————
DW 定義字(2字節(jié)).
PROC 定義過程.
ENDP 過程結(jié)束.
SEGMENT 定義段.
ASSUME 建立段寄存器尋址.
ENDS 段結(jié)束.
END 程序結(jié)束.
七、寄存器
1. Register usage in 32 bit Windows
Function parameters are passed on the stack according to the calling conventions listed on
page 13. Parameters of 32 bits size or less use one DWORD of stack space. Parameters
bigger than 32 bits are stored in little-endian form, i.e. with the least significant DWORD at the
lowest address, and DWORD aligned.
Function return values are passed in registers in most cases. 8-bit integers are returned in
AL, 16-bit integers in AX, 32-bit integers, pointers, and Booleans in EAX, 64-bit integers in
EDX:EAX, and floating-point values in ST(0). Structures and class objects not exceeding
64 bits size are returned in the same way as integers, even if the structure contains floating
point values. Structures and class objects bigger than 64 bits are returned through a pointer
passed to the function as the first parameter and returned in EAX. Compilers that don\'t
support 64-bit integers may return structures bigger than 32 bits through a pointer. The
Borland compiler also returns structures through a pointer if the size is not a power of 2.
Registers EAX, ECX and EDX may be changed by a procedure. All other general-purpose
registers (EBX, ESI, EDI, EBP) must be saved and restored if they are used. The value of
ESP must be divisible by 4 at all times, so don\'t push 16-bit data on the stack. Segment
registers cannot be changed, not even temporarily. CS, DS, ES, and SS all point to the flat
segment group. FS is used for a thread environment block. GS is unused, but reserved.
Flags may be changed by a procedure with the following restrictions: The direction flag is 0
by default. The direction flag may be set temporarily, but must be cleared before any call or
return. The interrupt flag cannot be cleared. The floating-point register stack is empty at the
entry of a procedure and must be empty at return, except for ST(0) if it is used for return
value. MMX registers may be changed by the procedure and if so cleared by EMMS before
returning and before calling any other procedure that may use floating-point registers. All
XMM registers can be modified by procedures. Rules for passing parameters and return
values in XMM registers are described in Intel\'s application note AP 589 "Software
Conventions for Streaming SIMD Extensions". A procedure can rely on EBX, ESI, EDI, EBP
and all segment registers being unchanged across a call to another procedure.
2. Register usage in Linux
The rules for register usage in Linux appear to be almost the same as for 32-bit windows.
Registers EAX, ECX, and EDX may be changed by a procedure. All other general-purpose
registers must be saved. There appears to be no rule for the direction flag. Function return
values are transferred in the same way as under Windows. Calling conventions are the
same, except for the fact that no underscore is prefixed to public names. I have no
information about the use of FS and GS in Linux. It is not difficult to make an assembly
function that works under both Windows and Linux, if only you take these minor differences
into account.
八、位操作指令，處理器控制指令
1.位操作指令，8086新增的一組指令，包括位測試，位掃描。BT,BTC,BTR,BTS,BSF,BSR
1.1 BT(Bit Test)，位測試指令，指令格式:
BT OPRD1,OPRD2,規(guī)則：操作作OPRD1可以是16位或32位的通用寄存器或者存儲單元。操作數(shù)OPRD2必須是8位立即數(shù)或者是與OPRD1操作數(shù)長度相等的通用寄存器。如果用OPRD2除以O(shè)PRD1，假設(shè)商存放在Divd中，余數(shù)存放在Mod中，那么對OPRD1操作數(shù)要進(jìn)行測試的位號就是Mod,它的主要功能就是把要測試位的值送往CF，看幾個簡單的例子：
1.2 BTC(Bit Test And Complement)，測試并取反用法和規(guī)則與BT是一樣，但在功能有些不同，它不但將要測試位的值送往CF，并且還將該位取反。
1.3 BTR(Bit Test And Reset)，測試并復(fù)位，用法和規(guī)則與BT是一樣，但在功能有些不同，它不但將要測試位的值送往CF，并且還將該位復(fù)位(即清0)。
1.4 BTS(Bit Test And Set)，測試并置位，用法和規(guī)則與BT是一樣，但在功能有些不同，它不但將要測試位的值送往CF，并且還將該位置位(即置1)。
1.5 BSF(Bit Scan Forward)，順向位掃描，指令格式:BSF OPRD1,OPRD2，功能：將從右向左(從最低位到最高位）對OPRD2操作數(shù)進(jìn)行掃描，并將第一個為1的位號送給操作數(shù)OPRD1。操作數(shù)OPRD1，OPRD2可以是16位或32位通用寄存器或者存儲單元，但OPRD1和OPRD2操作數(shù)的長度必須相等。
1.6 BSR(Bit Scan Reverse)，逆向位掃描，指令格式:BSR OPRD1,OPRD2，功能：將從左向右(從最高位到最低位）對OPRD2操作數(shù)進(jìn)行掃描，并將第一個為1的位號送給操作數(shù)OPRD1。操作數(shù)OPRD1，OPRD2可以是16位或32位通用寄存器或存儲單元，但OPRD1和OPRD2操作數(shù)的長度必須相等。
1.7 舉個簡單的例子來說明這6條指令:
AA DW 1234H,5678H
BB DW 9999H,7777H
MOV EAX,12345678H
MOV BX,9999H
BT EAX,8;CF=0,EAX保持不變
BTC EAX,8;CF=0,EAX=12345778H
BTR EAX,8;CF=0,EAX=12345678H
BTS EAX,8;CF=0,EAX=12345778H
BSF AX,BX;AX=0
BSR AX,BX;AX=15
BT WORD PTR [AA],4;CF=1，[AA]的內(nèi)容不變
BTC WORD PTR [AA],4;CF=1，[AA]=1223H
BTR WORD PTR [AA],4;CF=1，[AA]=1223H
BTS WORD PTR [AA],4;CF=1，[AA]=1234H
BSF WORD PTR [AA],BX;[AA]=0;
BSR WORD PTR [AA],BX;[AA]=15(十進(jìn)制)
BT DWORD PTR [BB],12;CF=1,[BB]的內(nèi)容保持不變
BTC DWORD PTR [BB],12;CF=1,[BB]=76779999H
BTR DWORD PTR [BB],12;CF=1,[BB]=76779999H
BTS DWORD PTR [BB],12;CF=1,[BB]=77779999H
BSF DWORD PTR [BB],12;[BB]=0
BSR DWORD PTR [BB],12;[BB]=31(十進(jìn)制)
2.處理器控制指令
處理器控制指令主要是用來設(shè)置/清除標(biāo)志，空操作以及與外部事件同步等。
2.1 CLC，將CF標(biāo)志位清0。
2.2 STC，將CF標(biāo)志位置1。
2.3 CLI，關(guān)中斷。
2.4 STI，開中斷。
2.5 CLD，清DF=0。
2.6 STD，置DF=1。
2.7 NOP，空操作，填補(bǔ)程序中的空白區(qū)，空操作本身不執(zhí)行任何操作，主要是為了保持程序的連續(xù)性。
2.8 WAIT，等待BUSY引腳為高。
2.9 LOCK，封鎖前綴可以鎖定其后指令的操作數(shù)的存儲單元，該指令在指令執(zhí)行期間一直有效。在多任務(wù)環(huán)境中，可以用它來保證獨占其享內(nèi)存，只有以下指令才可以用LOCK前綴:
XCHG,ADD,ADC,INC,SUB,SBB,DEC,NEG,OR,AND,XOR,NOT,BT,BTS,BTR,BTC
3.0 說明處理器類型的偽指令
.8086，只支持對8086指令的匯編
.186，只支持對80186指令的匯編
.286，支持對非特權(quán)的80286指令的匯編
.286C，支持對非特權(quán)的80286指令的匯編
.286P，支持對80286所有指令的匯編
.386，支持對80386非特權(quán)指令的匯編
.386C，支持對80386非特權(quán)指令的匯編
.386P，支持對80386所有指令的匯編
只有用偽指令說明了處理器類型，匯編程序才知道如何更好去編譯，連接程序，更好地去檢錯。
九，F(xiàn)PU instructions(摘自fasm的幫助文檔中,有時間我會反它翻譯成中文的)
The FPU (Floating-Point Unit) instructions operate on the floating–point
values in three formats: single precision (32–bit), double precision (64–bit)
and double extended precision (80–bit). The FPU registers form the stack
and each of them holds the double extended precision floating–point value.
When some values are pushed onto the stack or are removed from the top,
the FPU registers are shifted, so st0 is always the value on the top of FPU
stack, st1 is the first value below the top, etc. The st0 name has also the
synonym st.
fld pushes the floating–point value onto the FPU register stack. The
operand can be 32–bit, 64–bit or 80–bit memory location or the FPU register,
it’s value is then loaded onto the top of FPU register stack (the st0 register)
and is automatically converted into the double extended precision format.
fld dword [bx] ; load single prevision value from memory
fld st2 ; push value of st2 onto register stack
fld1, fldz, fldl2t, fldl2e, fldpi, fldlg2 and fldln2 load the commonly
used contants onto the FPU register stack. The loaded constants are
+1.0, +0.0, log2 10, log2 e, pi, log10 2 and ln 2 respectively. These instructions
have no operands.
fild convert the singed integer source operand into double extended precision
floating-point format and pushes the result onto the FPU register stack.
The source operand can be a 16–bit, 32–bit or 64–bit memory location.
fild qword [bx] ; load 64-bit integer from memory
fst copies the value of st0 register to the destination operand, which can
be 32–bit or 64–bit memory location or another FPU register. fstp performs
the same operation as fst and then pops the register stack, getting rid of
st0. fstp accepts the same operands as the fst instruction and can also
store value in the 80–bit memory.
fst st3 ; copy value of st0 into st3 register
fstp tword [bx] ; store value in memory and pop stack
fist converts the value in st0 to a signed integer and stores the result
in the destination operand. The operand can be 16–bit or 32–bit memory
location. fistp performs the same operation and then pops the register
stack, it accepts the same operands as the fist instruction and can also store
integer value in the 64–bit memory, so it has the same rules for operands as
fild instruction.
fbld converts the packed BCD integer into double extended precision
floating–point format and pushes this value onto the FPU stack. fbstp
converts the value in st0 to an 18–digit packed BCD integer, stores the
result in the destination operand, and pops the register stack. The operand
should be an 80–bit memory location.
fadd adds the destination and source operand and stores the sum in the
destination location. The destination operand is always an FPU register,
if the source is a memory location, the destination is st0 register and only
source operand should be specified. If both operands are FPU registers, at
least one of them should be st0 register. An operand in memory can be a
32–bit or 64–bit value.
fadd qword [bx] ; add double precision value to st0
fadd st2,st0 ; add st0 to st2
faddp adds the destination and source operand, stores the sum in the destination
location and then pops the register stack. The destination operand
must be an FPU register and the source operand must be the st0. When no
operands are specified, st1 is used as a destination operand.
38 CHAPTER 2. INSTRUCTION SET
faddp ; add st0 to st1 and pop the stack
faddp st2,st0 ; add st0 to st2 and pop the stack
fiadd instruction converts an integer source operand into double extended
precision floating–point value and adds it to the destination operand.
The operand should be a 16–bit or 32–bit memory location.
fiadd word [bx] ; add word integer to st0
fsub, fsubr, fmul, fdiv, fdivr instruction are similar to fadd, have
the same rules for operands and differ only in the perfomed computation.
fsub substracts the source operand from the destination operand, fsubr
substract the destination operand from the source operand, fmul multiplies
the destination and source operands, fdiv divides the destination operand by
the source operand and fdivr divides the source operand by the destination
operand. fsubp, fsubrp, fmulp, fdivp, fdivrp perform the same operations
and pop the register stack, the rules for operand are the same as for the faddp
instruction. fisub, fisubr, fimul, fidiv, fidivr perform these operations
after converting the integer source operand into floating–point value, they
have the same rules for operands as fiadd instruction.
fsqrt computes the square root of the value in st0 register, fsin computes
the sine of that value, fcos computes the cosine of that value, fchs
complements its sign bit, fabs clears its sign to create the absolute value,
frndint rounds it to the nearest integral value, depending on the current
rounding mode. f2xm1 computes the exponential value of 2 to the power of
st0 and substracts the 1.0 from it, the value of st0 must lie in the range ?1.0
to +1.0. All these instruction store the result in st0 and have no operands.
fsincos computes both the sine and the cosine of the value in st0 register,
stores the sine in st0 and pushes the cosine on the top of FPU register
stack. fptan computes the tangent of the value in st0, stores the result in
st0 and pushes a 1.0 onto the FPU register stack. fpatan computes the
arctangent of the value in st1 divided by the value in st0, stores the result
in st1 and pops the FPU register stack. fyl2x computes the binary logarithm
of st0, multiplies it by st1, stores the result in st1 and pop the FPU
register stack; fyl2xp1 performs the same operation but it adds 1.0 to st0
before computing the logarithm. fprem computes the remainder obtained
from dividing the
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